1 Introduction

Quantization is a fundamental process in analog to digital converters (ADCs). Emerging wireless standards require the ADCs to possess wide bandwidth, high dynamic range, high signal to noise rate (SNR), simple structure, and low power consumption^[1-2]. Sigma-Delta (ΣΔ) ADCs are promising for achieving these features because of their simplified oversampling and noise-shaping features. ΣΔ modulator is the most important part in ΣΔ ADC systems so that high performance ΣΔ modulators are much desired to be researched.

At present, the industrial demand for ΣΔ modulators have been quickly increased since it was successfully used in Micro-Electromechanical System (MEMS) accelerometers^[3-6]. Closed-loop ΣΔ modulators enable MEMS accelerometers to effectively suppress the quantization noise caused by ADCs or quantizers^[7-10]. Based on these advantages, many researchers have been striving to enhance dynamic range, linearity, and bandwidth of ΣΔ modulators. So far, in order to improve both stability and noise-shaping ability, ΣΔ modulators are always designed by single loop and high-order architectures. Therefore, many latterly reported interfaces for ΣΔ modulators possess the features of single loop, high-order, and single-bit force feedback^[11-13]. However, such architecture has to confront with loop instability. Therefore, it is necessary to compromise many aspects in circuit implementation so as to design a high performance ΣΔ modulator system with ideal robust stability. The stability of ΣΔ modulators will be weakened by unavoidable noises including Brownian noise, electrical noise, and quantization noise.In this paper, we applied a novel disturbance observer (DOB) with a Bode's ideal cut-off (BICO) filter to eliminate the system noises for ΣΔ modulators^[14]. Specifically, a BICO filter was employed in the DOB to provide disturbance rejection performance for compensating the system noises and modeling mismatches.

In this paper, the proposed BICO with DOB was designed to make up mismatches of system parameters and external disturbances for ΣΔ modulator systems. It is normally impossible to obtain an accurate mathematic model for a ΣΔ modulator because of the Brownian noise, electrical noise, and quantization noise or deviations in the manufacturing process. However, the proposed BICO-DOB applied a fractional-order filter, which can provide extra freedom to improve performance by weakening the effect of system noises^[15].

A BICO-DOB for the ΣΔ modulator was used in this paper. The rest of the paper is structured as follows: Section 2 demonstrates the concept of BICO-DOB and Section 3 presents the proposed BICO-DOB for the ΣΔ modulator. Then simulation results from the proposed high-order ΣΔ modulator with BICO is given in Section 4 with the conclusions drawn in Section 5.

2 Disturbance Observer

The simplified architecture of a DOB is depicted in Fig. 1.

In Fig. 1, G_p(s) denotes the plant model, d and ${\tilde d_f} $ denote the equivalent disturbance and observing disturbance value, respectively. ${\tilde d_f} $ is thus expressed by Eq. (1):

$ \tilde{d}_{f}=(u+d) \cdot G_{p}(s) \cdot G_{p}^{-1}(s)-u=d $

(1)

According to Eq. (1), the equivalent disturbance d is well observed by the DOB scheme shown in Fig. 1. DOB can also achieve independent tuning between the disturbance elimination and input command under the condition of external disturbances and modelling deviations. However, the realization of a DOB suffers three problems in a certain system^[16] as follows:

1) Under normal conditions, the numerator's order of G_p(s) is less than or equal to the denominator's order so that G_p^－1(s) cannot be implemented in practical systems;

2) The mathematic model G_p(s) is inaccurate due to the parameters' variation caused by external or internal disturbances;

3) The control quality of a practical system would be deteriorated by the unavoidable noises.

Fortunately, a Q-filter and G_n(s) can be used to solve the abovementioned problems. Fig. 2 depicts the modified structure of the DOB.

In Fig. 2, Q(s) is used to realize the G_p^－1(s)·Q(s) and the Q-filter can be expressed as

$ Q(s)=\frac{1}{(\tau s+1)^{n}} $

(2)

where τ is a time constant, n is the order, which is selected to make G_p^－1(s)·Q(s) realizable. In other words, n is selected to make the numerator's order of G_p^－1(s)·Q(s) less than or equal to denominator's order. Details about the BICO-DOB are discussed below.

In Ref. [12], the concept of the BICO filter was introduced by Bode, which provides an ideal trade-off between the system phase margin and the cut-off frequency. The BICO filter is expressed by Eq. (3):

$ \beta(s)=\frac{K}{\left(\sqrt{1+\left(s / \omega_{0}\right)^{2}}+\left(s / \omega_{0}\right)\right)^{2(1-\eta)}} $

(3)

where ω₀ denotes cut-off frequency, η is the order of the BICO filter, and η∈(0, 1) is a fractional order. BICO-DOB is provided with more flexibility than the traditional DOB for disturbance elimination. According to Eq. (3), the slope of the β(s) gain is －40(1－η) dB/dec. The Bode plot of β(s) (with ω₀=10 and η=0.5) is shown in Fig. 3.

In this paper, the main topic is to validate the effect of using BICO-DOB scheme on ΣΔ modulators. As is well known, robustness is a crucial aspect to be considered when designing a ΣΔ modulator. As shown in Fig. 3, we can easily find that the BICO filter possesses insensitivity in pass-band frequency range and a sharp cut-off. Also it can be found that the phase of the BICO filter is relatively insensitive to uncertainties in stop-band frequency range because the phase property is almost constant. Therefore, we investigated the validity of applying BICO-DOB motivated by finding an effective way to design high performance and strong robust ΔΣ modulator systems.

3 High-Order ΣΔ Modulator with BICO-DOB

The basic structure of the ΣΔ modulator is depicted in Fig. 4.

As shown in Fig. 4, the high-order ΣΔ modulator consists of six basic functional blocks: a) a mechanical sensor element; b) an AFE block; c) an n-bit ADC; d) a digital loop filter; e) a 1-bit quantizer; and f) a 1-bit DAC. ΣΔ modulator is a mixed nonlinear feedback system made up of components in both mechanical domain and electrical domain.

Fig. 5 shows a simplified architecture of the ΣΔ modulator system, where

In Fig. 5,

$ W{\rm{ (}}s{\rm{) = }}{K_{\rm{0}}}M{\rm{ (}}s{\rm{) }}H{\rm{ (}}s{\rm{)}} $

(4)

where H(s) is the continuous time response of loop filter H(z). The transfer function of the mechanical sensor element M (s) is expressed by Eq. (5):

$ M(s)=\frac{1}{s^{2}+\frac{b}{m} s+\frac{k}{m}} $

(5)

where m, b, and k are the proof mass, damping coefficient, and spring constant, respectively. b and k are not always the certain parameters, which is caused by the manufacturing process.

The proposed structure of the ΣΔ modulator with a BICO-DOB is shown in Fig. 6.

In Fig. 6, W^－1(s) is the inverse model of the W(s), β(s) is the BICO filter, and e^－s·T_d is the time delay. As mentioned above, Brownian noise, electrical noise, and quantization noise are the main noise sources in ΣΔ modulator systems. Brownian noise is caused by thermal motion of the air molecules surrounding the sensor element, and electrical noise is caused by amplifier circuit (AFE), whereas quantization noise comes from the 1-bit quantizer, which can be effectively eliminated by the digital loop filter H(z). In this paper, the BICO-DOB is used to eliminate the effect of the parameters' derivation and the system noise

$ d_{\text {total }}\left(d_{\text {total }}=d_{\text {Brown }}+d_{\text {Electrical }}\right) $

4 Simulation Results

The simulated model of the proposed ΣΔ modulator is shown in Fig. 7.

In Fig. 7, the sample frequency is chosen as 128 kHz and the oversampling ratio is specified as 64. The system parameters in Fig. 7 are listed in Table 1.

In this paper, we selected a 4th-order filter as the digital loop filter H(z), which can be written as

$ H(z)=\frac{37 z^{4}-137.1 z^{3}+191.3 z^{2}-119 z+27.86}{z^{4}-2.995 z^{3}+2.99 z^{2}-0.995 z} $

(6)

The parameters of the digital loop filter H(z) have been adjusted empirically in our previous experimental work. Thus, we mainly focused on the validity of applying BICO-DOB in ΣΔ modulator systems in this paper, and the design method of parameters of digital loop filter H(z) is not specifically described here. The time delay of the W(s) was about 0.1 ms, so the T_d in Fig. 7 was set as 0.1 ms. The cut-off frequency ω₀ was set as 1 000 rad/s, and without loss of generality, the gain K of BICO filter β(s) was set as 1.

Therefore, the relative order η of β(s) was the only knob to tune. In order to rapidly obtain and optimize the relative order η, PSO algorithm^[17] was applied. In this paper, the SNR was set as the objective of the ΣΔ modulator system, which can be calculated based on the power spectral density of the output bitstream produced by the proposed ΣΔ modulator.

In the numerical experiment, the proposed ΣΔ modulator with BICO-DOB achieved the highest SNR=148.409 dB of SNR by yielding the optimal value for η=－0.25. Therefore, here we took η=－0.25 in Eq. (3):

$ \begin{array}{c} \beta(s)=\frac{1}{(\sqrt{1+(s / 1000)^{2}}+(s / 1000))^{2.5}}= \\ \frac{1}{(\sqrt{1+(s / 1000)^{2}+(s / 1000)})^{2}} \\ \frac{1}{(\sqrt{1+(s / 1000)^{2}+(s / 1000)})^{0.5}} \end{array} $

(7)

It is worth noting that in the simulation the fractional order differentiator s^0.5 of the system was approximated with Oustaloup approximation^[18] in the frequency range [10^－4, 10⁴] rad/s and N=5.

Taking η=－0.25 into Fig. 7 and running the Simulink model (Fig. 7) again, the corresponding SNR was 148.409 dB. Fig. 8 shows the noise floor of the ΣΔ modulator without the BICO scheme. Compared with the ΣΔ modulator without the BICO scheme, the proposed ΣΔ modulator with the BICO-DOB achieved higher SNR and lower noise floor.

As discussed above, the damping coefficient b and spring constant k are variables all the time. Therefore, we chose different b and k values to verify the robustness of the proposed method. To be specific, we took spring constant as k_s1=60, 120, and 240 N/m. Fig. 9 shows the PSD plot of the ΣΔ modulator with different spring constant k values.

Similarly, we chose different damping coefficient b values to verify the robustness of the proposed ΣΔ modulator. To be specific, we set the b values as 1.8×10^-3 Ns/m, 3.6×10^-3 Ns/m, and 5.4×10^-3 Ns/m. Fig. 10 shows the PSD plot of the ΣΔ modulator with different b values.

Fig. 11 and Fig. 12 demonstrate the weak robustness of the ΣΔ modulator without the BICO-DOB scheme, which proves that the proposed method possesses better robustness than the pure 6th-order ΣΔ modulator does.

It can be seen from Figs. 9-12 that the proposed ΣΔ modulator only shows slight fluctuation in noise floor and SNR, which indicates that the proposed BICO-DOB scheme enables the ΣΔ modulator to be robust to the variable parameters of the sensor element. We can also find that the robustness of the proposed ΣΔ modulator is stronger than the pure 6th-order ΣΔ modulator.

5 Conclusions

A new design of a 6 th-order ΣΔ modulator using the proposed BICO-DOB is presented in this paper. The designed 6 th-order ΣΔ modulator achieved SNR=148.409 dB and noise floor under -190 dB in the simulation study. The results from the simulation by MATLAB platform show that the proposed BICO-DOB scheme for the ΣΔ modulator can achieve better robustness.