Author Name | Affiliation | Zhao Chun Hui | School of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China | Hou Yan Li | School of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China | Hu Jia Wei | School of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China | Lan Hai Yan | School of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,China |
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Abstract: |
Aimed at the generation of high-quality test set in the shortest possible time, the test generation for combinational circuits (CC) based on the chaotic particle swarm optimization (CPSO) algorithm is presented according to the analysis of existent problems of CC test generation, and an appropriate CPSO algorithm model has been constructed. With the help of fault simulator, the test set of ISCAS’85 benchmark CC is generated using the CPSO, and some techniques are introduced such as half-random generation, and simulation of undetected faults with original test vector and inverse test vector. Experimental results show that this algorithm can generate the same fault coverage and small-size test set in short time compared with other known similar methods, which proves that the proposed method is applicable and effective. |
Key words: test generation combinational circuits particle swarm optimization chaotic optimization |
DOI:10.11916/j.issn.1005-9113.2009.01.013 |
Clc Number:TN407 |
Fund: |