| Author Name | Affiliation | Postcode | | Lin Jiang* | Integrated Circuit Design Laboratory, Xi’an University of Science and Technology, Shaanxi 710054, China | 710600 | | Xueting Zhang | School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Shaanxi 710121, China | 710121 | | Rui Shan | School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Shaanxi 710121, China | 710121 | | Xiaoyan Xie | School of Computer Science and Technology, Xi’an University of Posts and Telecommunications, Shaanxi 710121, China | 710121 | | Xinchuang Liu | School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Shaanxi 710121, China | 710121 | | Feilong He | School of Computer Science and Technology, Xi’an University of Posts and Telecommunications, Shaanxi 710121, China | 710121 |
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| Abstract: |
| The Rate Distortion Optimization (RDO) algorithm in High Efficiency Video Coding (HEVC) has many iterations and a large number of calculations. In order to decrease the calculation time and meet the requirements of fast switching of RDO algorithms of different scales, an RDO dynamic reconfigurable structure is proposed. First, the Quantization Parameter (QP) and bit rate values were loaded through an H-tree Configurable Network (HCN), and the execution status of the array was detected in real time. When the switching request of the RDO algorithm was detected, the corresponding configuration information was delivered. This self-reconfiguration implementation method improved the flexibility and utilization of hardware. Experimental results show that when the control bit width was only increased by 31.25%, the designed configuration network could increase the number of controllable processing units by 32 times, and the execution cycle was 50% lower than the same type of design. Compared with previous RDO algorithm, the RDO algorithm implemented on the reconfigurable array based on the configuration network had an average operating frequency increase of 12.5% and an area reduction of 56.4%. |
| Key words: dynamic reconfiguration, rate distortion optimization, Huffman-coding-like, context switch, video processing |
| DOI：10.11916/j.issn.1005-9113.19032 |
| Clc Number:TP302 |
| Fund: |
