In order to prevent high error floor of classic Turbo at middle and high SNRs, a modified Turbo codes, named as 3D-Turbo codes, is proposed in which some of the parity bits from the classical encoders are further encoded by a rate-1 post encoder. The encoder structure of 3D-Turbo Codes is introduced and analysis of main factors affecting performance is provided, then the iterative decoding process and detailed derivation of the Max-Log-Map algorithm of 3D-Turbo Codes is presented, performance based on 3GPP2 standards is simulated. The theoretical analysis and results show that 3D-Turbo Codes have lower error floor compared to 3GPP2 Turbo Codes, at the expense of a very small increase in complexity. Therefore, under middle or high SNRs and strict BER requirement, 3D-Turbo Codes are expected to have extensive application prospects.