To solve the problems that the time resolution and measurement error of time-to-digital converter (TDC) are mutually restricted, and the single photon detection system has low working frequency and long dead time, a high-speed single photon detection system for fluorescence lifetime imaging was designed. The system integrates a 6×6 single photon avalanche diode (SPAD) array and a two-stage TDC. In this system, the SPADs are connected in parallel with each other to increase the photosensitive area. The quenching circuit could effectively reduce the detection dead time and afterpulse effect by automatically controlling the two discharge branches. Both high resolution and large dynamic range were achieved by the two-stage TDC structure, where a novel three-channel vernier structure was adopted to reduce the measurement uncertainty. The memory temporarily stored the measurement time interval in the corresponding address, and after the measurement, the UART circuit read data into the computer by the order of address. The system was simulated on the basis of TSMC 0.18 μm CMOS technology, and the overall layout area was 2 800 μm×1 800 μm. Simulation results show that the breakdown voltage of SPAD was about 11.3 V, the avalanche current was about 10^-3 A, and the dead time of quenching circuit was about 40 ns. TDC could achieve a time resolution of 30 ps and a total conversion dynamic range of 241 ns. The whole system detected two fluorescent signals at a clock frequency of 526 MHz, and the quantization error was less than 10 ps.