To improve the temperature uniformity of the wafer and better the device performance, a combined conduction and radiation heat transfer model was used to simulate the heat transfer within wafer during Rapid Thermal Process, and the effects of the ratio of gate width to the pattern period (lG／lP=0.5,0.0,0.25) on the temperature distribution were investigated, under three fixed doped silicon gate widths (lT=0,0, 60μm). The results show that, under the same doped silicon gate width, the temperature level of wafer decreases, the temperature difference reduces and the temperature uniformity of the wafer surface increases with the increase of the pattern arrangement density. Under the same doped silicon gate arrangement density, the temperature level enhances but the temperature uniformity changes little with the increase of the doped silicon gate width. This is because the wafer pattern structure changes the surface absorptance, adjusts the absorbing and distributing level of incident radiation energy, and transforms the temperature level and uniformity.