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Supervised by Ministry of Industry and Information Technology of The People's Republic of China Sponsored by Harbin Institute of Technology Editor-in-chief Yu Zhou ISSNISSN 1005-9113 CNCN 23-1378/T

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Related citation:LIU Xiao-wei,LI Hai-tao,YIN Liang,CHEN Wei-ping,SUO Chun-guang,ZHOU Zhi-ping.Noise analysis and characterization of a full differential CMOS interface circuit for capacitive closed-loop micro-accelerometer[J].Journal of Harbin Institute Of Technology(New Series),2010,17(5):684-689.DOI:10.11916/j.issn.1005-9113.2010.05.016.
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Noise analysis and characterization of a full differential CMOS interface circuit for capacitive closed-loop micro-accelerometer
Author NameAffiliation
LIU Xiao-wei Dept.of Microelectronics,Harbin Institute of Technology,Harbin 150001,China
Key Laboratory of Micro-Systems and Micro-Structures Manufacturing,Ministry of Education,Harbin 150001,China 
LI Hai-tao Dept.of Microelectronics,Harbin Institute of Technology,Harbin 150001,China 
YIN Liang Dept.of Microelectronics,Harbin Institute of Technology,Harbin 150001,China 
CHEN Wei-ping Dept.of Microelectronics,Harbin Institute of Technology,Harbin 150001,China
Key Laboratory of Micro-Systems and Micro-Structures Manufacturing,Ministry of Education,Harbin 150001,China 
SUO Chun-guang Dept.of Microelectronics,Harbin Institute of Technology,Harbin 150001,China 
ZHOU Zhi-ping Dept.of Microelectronics,Harbin Institute of Technology,Harbin 150001,China 
Abstract:
To achieve a high precision capacitive closed-loop micro-accelerometer,a full differential CMOS based on switched-capacitor circuit was presented in this paper as the sensor interface circuit.This circuit consists of a balance-bridge module,a charge sensitive amplifier,a correlated-double-sampling module,and a logic timing control module.A special two-path feedback circuit configuration was given to improve the system linearity.The quantitative analysis of error voltage and noise shows that there is tradeoff around circuit’s noise,speed and accuracy.A detailed design method was given for this tradeoff.The noise performance optimized circuit has a noise root spectral density of 1.0 μV/Hz,equivalent to rms noise root spectral density of 1.63 μg/Hz.Therefore,the sensor’s Brown noise becomes the main noise source in this design.This circuit is designed with 0.5 μm n-well CMOS process.Under a ±5 V supply,the Hspice simulation shows that the system sensitivity achieves 0.616 V/g,the system offset is as low as 1.456 mV,the non-linearity is below 0.03%,and the system linear range achieves ±5 g.
Key words:  low noise  full differential  switched-capacitor  closed-loop  capacitive micro-accelerometer
DOI:10.11916/j.issn.1005-9113.2010.05.016
Clc Number:TH824.4
Fund:

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