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Supervised by Ministry of Industry and Information Technology of The People's Republic of China Sponsored by Harbin Institute of Technology Editor-in-chief Yu Zhou ISSNISSN 1005-9113 CNCN 23-1378/T

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Related citation:Lin Jiang,Xueting Zhang,Rui Shan,Xiaoyan Xie,Xinchuang Liu.Dynamic Reconfigurable Structure with Rate Distortion Optimization[J].Journal of Harbin Institute Of Technology(New Series),2020,27(6):35-47.DOI:10.11916/j.issn.1005-9113.19032.
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Dynamic Reconfigurable Structure with Rate Distortion Optimization
Author NameAffiliation
Lin Jiang Integrated Circuit Design Laboratory, Xi’an University of Science and Technology, Shaanxi 710054,China 
Xueting Zhang School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Shaanxi 710121,China 
Rui Shan School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Shaanxi 710121,China 
Xiaoyan Xie School of Computer Science and Technology, Xi’an University of Posts and Telecommunications, Shaanxi 710121,China 
Xinchuang Liu School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Shaanxi 710121,China
School of Computer Science and Technology, Xi’an University of Posts and Telecommunications, Shaanxi 710121,China 
Abstract:
The Rate Distortion Optimization (RDO) algorithm in High Efficiency Video Coding (HEVC) has many iterations and a large number of calculations. In order to decrease the calculation time and meet the requirements of fast switching of RDO algorithms of different scales, an RDO dynamic reconfigurable structure is proposed. First, the Quantization Parameter (QP) and bit rate values were loaded through an H-tree Configurable Network (HCN), and the execution status of the array was detected in real time. When the switching request of the RDO algorithm was detected, the corresponding configuration information was delivered. This self-reconfiguration implementation method improved the flexibility and utilization of hardware. Experimental results show that when the control bit width was only increased by 31.25%, the designed configuration network could increase the number of controllable processing units by 32 times, and the execution cycle was 50% lower than the same type of design. Compared with previous RDO algorithm, the RDO algorithm implemented on the reconfigurable array based on the configuration network had an average operating frequency increase of 12.5% and an area reduction of 56.4%.
Key words:  dynamic reconfiguration  rate distortion optimization  Huffman-coding-like  context switch  video processing
DOI:10.11916/j.issn.1005-9113.19032
Clc Number:TP302
Fund:
Descriptions in Chinese:
  

基于率失真优化的动态可重构结构

蒋林1,张雪婷2,山蕊2,谢晓燕3,刘新闯2,贺飞龙3

(1.西安科技大学 集成电路设计实验室,西安 710054;

2.西安邮电大学 电子工程学院,西安 710121;

3.西安邮电大学 计算机学院,西安 710121)

摘要

高效视频编码(High Efficiency Video Coding,HEVC)中的率失真优化(The Rate Distortion Optimization,RDO)算法具有许多的迭代和大量的计算,为减少计算时间满足不同规模RDO算法快速切换的需求。提出一种RDO动态可重构结构。首先,通过H树型配置网络(H-tree Configurable Network,HCN)加载量化参数(Quantization Parameter,QP)和比特率值,并实时检测阵列的执行状态。当检测到RDO算法的重构请求时,下发相应的配置信息。这种硬件自适应的自重构实现方法提高了硬件的灵活性和利用率。实验结果表明:当配置网路的控制位宽度仅增加31.25%时,可控处理单元的数量增加了32倍,执行周期比同类型设计降低了50%。与其他RDO实现方法相比,在基于配置网络的可重配置阵列上实现的RDO算法的平均工作频率增加了12.5%,面积减少了56.4%。

关键词:动态可重构;速率失真优化;类似霍夫曼编码;上下文切换;视频处理

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