| 引用本文: | 张超,喻明艳.M5-EDGE分布式取指模型设计[J].哈尔滨工业大学学报,2017,49(5):16.DOI:10.11918/j.issn.0367-6234.201508011 |
| ZHANG Chao,YU Mingyan.The design and analysis of distributed fetch based on M5-edge[J].Journal of Harbin Institute of Technology,2017,49(5):16.DOI:10.11918/j.issn.0367-6234.201508011 |
|
| 摘要: |
| 为解决M5-edge模拟器的理想化集总式取指令结构对基于EDGE体系结构设计空间探索的限制问题，对原模拟器的取指令前段进行分布式设计，包括总体的功能、具体的取指单元及单元间的互连网络设计，并在取指令块头的方式上设计了固定方式和循环方式两种方案.通过对实现后的结构进行在不同分布单元数量条件下的仿真分析，得到从理想集总式取指结构到实际分布式结构的性能下降关系和不同取指令块头方式的优劣.通过进一步分析，得出通信延迟和缓存缺失率对处理器性能的影响.
|
| 关键词: EDGE体系结构 分布式取指 通信延迟 缓存缺失率 |
| DOI：10.11918/j.issn.0367-6234.201508011 |
| 分类号:TP302.7 |
| 文献标识码:A |
| 基金项目: |
|
| The design and analysis of distributed fetch based on M5-edge |
|
ZHANG Chao,YU Mingyan
|
|
（Department of Astronautics, Harbin Institute of Technology, Harbin 150001, China)
|
| Abstract: |
| A distributed fetch structure of M5-edge is designed for the purpose of expanding the design space of EDGE architecture. The structure includes the overall function, distributed fetch unit and the interconnection network between the units. Two kinds of fetching block head are realized, including fixed fashion and round robin one. The analyses, which are made in different distributed fetch unit counts, provide the leave of reduction of distributed fetch comparing with the ideal lumped fetch model, as well as the difference between the two fashions of fetching block head. Furthermore, the effect of the processor performance by the communication latency and the cache miss rate are shown.
|
| Key words: EDGE distributed fetch communication latency cache miss rate |
