引用本文: | 雷雪梅,王志功,沈连丰,王科平.DRM/DAB/AM/FM频率综合器中吞吐脉冲分频器的设计[J].哈尔滨工业大学学报,2014,46(3):74.DOI:10.11918/j.issn.0367-6234.2014.03.013 |
| LEI Xuemei,WANG Zhigong,SHEN Lianfeng,WANG Keping.A design of pulse swallow frequency divider for DRM/DAB/AM/FM frequency synthesizer[J].Journal of Harbin Institute of Technology,2014,46(3):74.DOI:10.11918/j.issn.0367-6234.2014.03.013 |
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摘要: |
为使DRM/DAB/AM/FM频率综合器具有良好性能,本文设计了一种高速大分频比低功耗吞吐脉冲分频器. 此吞吐脉冲分频器由32/33双模预分频器(dual-modulus prescaler, DMP)、5位吞吐计数器和11位可编程分频器及时序控制电路构成. 此吞吐脉冲分频器内部的不同模块分别采用SCL、TSPC、CMOS静态触发器及可置位的CMOS静态触发器等多种触发器结构优化,使此吞吐脉冲分频器具有高速、大分频比和低功耗的特点. 此吞吐脉冲分频器应用中芯国际SMIC 0.18 μm RF CMOS工艺流片,芯片核心面积为270 μm×110 μm. 测试结果显示,在1.8 V工作电压的条件下,此吞吐脉冲分频器的最高工作频率为3.4 GHz,工作频率范围为0.9~3.4 GHz. 在输入信号频率为3.4 GHz,分频比为45 695时,功耗为3.2 mW. 实验结果表明,此吞吐脉冲分频器完全满足DRM/DAB/AM/FM频率综合器的要求. |
关键词: 吞吐脉冲分频器 高速 大分频比 低功耗 DRM/DAB/AM/FM频率综合器 |
DOI:10.11918/j.issn.0367-6234.2014.03.013 |
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基金项目:科技部中小企业创新基金资助项目(11c26213211234);内蒙古自治区高等学校科学技术研究资助项目(NJZY11016). |
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A design of pulse swallow frequency divider for DRM/DAB/AM/FM frequency synthesizer |
LEI Xuemei1,2, WANG Zhigong1, SHEN Lianfeng1, WANG Keping3
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(1. School of Information Science and Engineer, Southeast University, 210096 Nanjing,China; 2. College of Electronic Information Engineering, Inner Mongolia University, 010010 Hohhot,China; 3. Dept. of Electrical Engineering, University of Washington, 98195 Seattle,USA)
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Abstract: |
For the good performance of DRM/DAB/AM/FM frequency synthesizer, the implementation of a high-speed large division ratio low-power pulse swallow frequency divider is described, which consists of a divided-by-32/33 dual-modulus prescaler (DMP), a 5 bits swallow counter, an 11-bits programmable divider, and a time sequence control circuit. The different modules of pulse swallow frequency divider apply SCL, TSPC, CMOS static flip-flop DFF, and CMOS static flip-flop DFF with preset to realize the low power, large division ratio, and high speed performances. The chip has been fabricated in a 0.18 μm CMOS process of SMIC and the core area is 270 μm×110 μm. Measured results show that its most high operation frequency is 3.4 GHz and the rang of operation frequency is from 0.9 GHz to 3.4 GHz. And when the operating frequency is 3.4 GHz and division ratio is 45 695, the maximum core power consumption is 3.2 mW under 1.8 V power supply. Its performance satisfies the requirement of DRM/DAB/AM/FM frequency synthesizer. |
Key words: pulse swallow frequency divider high speed large division ratio low power consumption DRM/DAB/AM/FM frequency synthesizer |